• CN:11-2187/TH
  • ISSN:0577-6686

机械工程学报 ›› 2024, Vol. 60 ›› Issue (5): 209-218.doi: 10.3901/JME.2024.05.209

• 数字化设计与制造 • 上一篇    下一篇

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硅外延生长反应腔内外延反应过程的数值仿真建模及实验研究

邓世伟1,2, 沈文杰2,3, 陈宇宏1,2, 白天1,2, 梅德庆1,2, 汪延成1,2   

  1. 1. 浙江大学流体动力基础件与机电系统全国重点实验室 杭州 310058;
    2. 浙江大学浙江省先进制造技术重点实验室 杭州 310058;
    3. 浙江晶盛机电股份有限公司 绍兴 310023
  • 收稿日期:2023-06-22 修回日期:2023-12-07 出版日期:2024-03-05 发布日期:2024-05-30
  • 通讯作者: 汪延成,男,1982年出生,博士,教授,博士研究生导师。主要研究方向为机器人智能感知、微制造技术。E-mailyanchwang@zju.edu.cn
  • 作者简介:邓世伟,男,2000年出生。主要研究方向为集成电路制造装备。E-mail22260024@zju.edu.cn;沈文杰,男,1987年出生,博士研究生。研究方向为集成电路制造装备。E-mailshenwenjie@jsjd.cc;陈宇宏,男,1998年出生,硕士。主要研究方向为硅外延生长技术。E-mailchenyh1998@zju.edu.cn;白天,男,1996年出生,硕士。主要研究方向为硅外延生长技术。E-mailbaitian@zju.edu.cn;梅德庆,男,1973年出生,博士,教授,博士研究生导师。主要研究方向为氢能装备设计与制造、微制造技术。E-mailmedqmei@zju.edu.cn
  • 基金资助:
    国家自然科学基金(52175522)和浙江省重点研发计划(2020C01034, 2022C01041)资助项目。

Numerical Modeling and Experimental Study of the Reaction Process in Silicon Epitaxial Growth Reaction Chamber

DENG Shiwei1,2, SHEN Wenjie2,3, CHEN Yuhong1,2, BAI Tian1,2, MEI Deqing1,2, WANG Yancheng1,2   

  1. 1. State Key Laboratory of Fluid Power & Mechatronic Systems, Zhejiang University, Hangzhou 310058;
    2. Zhejiang Province Key Laboratory of Advanced Manufacturing Technology, Zhejiang University, Hangzhou 310058;
    3. Zhejiang Jingsheng Mechanical & Electrical Co., Ltd., Shaoxing 310023
  • Received:2023-06-22 Revised:2023-12-07 Online:2024-03-05 Published:2024-05-30

摘要: 硅外延片是大规模集成电路、半导体器件等的基础功能材料,是通过外延反应在单晶硅片上生长均匀的外延薄层。外延层的厚度和电阻率的均匀性控制是硅外延生长的关键技术难题,其生长质量受反应腔室的结构与热流场设计影响较大。基于单片式硅外延生长反应腔室的结构,建立了反应腔内气体输运与外延反应的多物理场仿真模型,分析了腔室结构对热场分布均匀性的影响规律。随后通过数值仿真,研究了载气流量、进气梯度、基座转速等工艺参数对硅外延生长反应过程的影响。随后,开展了反应腔内多测点温度的测试实验,结果表明不同工艺条件下数值仿真预测的温度与实测的温度分布及变化规律相较一致,最大温度预测偏差< 1.2%。基于仿真分析,获得了优化的外延生长工艺参数组合,并开展了200 mm硅外延生长反应实验,测试结果表明硅外延层的厚度不均匀性< 0.76%,电阻率不均匀性< 1.58%,满足集成电路硅片制造所需的外延层高品质生长要求。

关键词: 硅外延层, 外延生长, 化学气相沉积, 热流场, 反应腔室

Abstract: Silicon epitaxial wafer is the basic functional material for large scale integrated circuits and semiconductor devices, etc. It is the growth of uniform epitaxial thin layer on single crystal silicon wafer through epitaxial reaction, the uniformity control of epitaxial layer's thickness and electrical resistivity is the key challenge of silicon epitaxial growth. The growth quality of silicon epitaxial layers is significantly influenced by the design of reaction chamber and thermal flow field. A multi-physics field simulation model to analyze the effects of chamber structure on the uniformity of thermal field distribution is established. Additionally, the effects of process parameters such as carrier gas flow rate, inlet gradient and susceptor speed on the silicon epitaxial growth reaction process through numerical simulation are investigated. Experimental results from multi-point temperature tests of reaction chamber demonstrate a high level of agreement between predicted and measured temperature distributions under different process conditions, with a maximum temperature prediction deviation < 1.2%. Based on the simulation analysis, an optimized combination of epitaxial growth reaction parameters is obtained, and then perform silicon epitaxial growth experiments on 200 mm wafers. The testing results show that a thickness inhomogeneity < 0.76% and an in-chip resistivity non-uniformity < 1.58%, satisfying the requirements for high quality in silicon epitaxial layer growth for integrated circuits.

Key words: silicon epitaxy layer, epitaxial growth, chemical vapor deposition, heat flow field, reaction chamber

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